От: fpga journal update [news@fpgajournal.com]
Отправлено: 20 июля 2005 г. 5:10
Кому: Michael Dolinsky
Тема: FPGA Journal Update Vol VIII No 3


a techfocus media publication :: July 19, 2005 :: volume VIII, no. 03


FROM THE EDITOR

This week Actel announced its new Fusion family, bringing mixed-signal capability to flash-based platform FPGAs. The addition of analog to the offering moves the market for programmable platforms into new territory. Fusion also includes Actel’s new development environment, designed to simplify the rapid creation of single-chip systems using the new devices. Our latest feature article goes into detail on Actel’s new architecture.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal


LATEST NEWS

July 18, 2005

STMicroelectronics Unveils First in Family of Configurable System-on-Chip ICs

Lattice Adds Block Modular Design to ispLEVER FPGA Design Tools

Actel Introduces Fusion Technology and Ushers in Era of the Programmable System Chip

Altera Offers Faster Speed Grade for High-Density Stratix II FPGAs

Lattice MachXO Devices Provide New Low Cost Alternative to CPLDs and FPGAs -- Embedded Flash Plus SRAM Technology Enables Crossover Programmable Logic Devices to Expand Beyond Traditional CPLDs and FPGAs

Nallatech to Collaborate with SGI on Developing FPGA High-Performance Computing Solutions; Agreement Will Target New Business Opportunities for Demanding FPGA-Based Computing Systems

July 15, 2005

Eureka Technology Successfully Validated and Demonstrated PCI Express Controller IP Core

July 14, 2005

Aplus and Flextronics Semiconductor Sign Licensing Agreement for Embedded EEPROM

Genesys Logic First to Market with PCI Express PIPE PHY Chip

July 13, 2005

PrismTech's Spectra OE (Operating Environment) Changes the Rules for Software Communications Architecture (SCA) Developers; Single Vendor Pre-Integrated COTS OE Eliminates Developer Integration Headaches

NI CompactRIO Adds Controller Area Network (CAN) Communication for In-Vehicle Data Acquisition and Control


CURRENT FEATURE ARTICLES

Actel Adds Analog
There's Fusion in our Future
SRC Code
'Tis a Far, Far Better Compiler
A New Spin on FPGA Re-spins
by Juergen Jaeger, Mentor Graphics
LSI Logic's Leverage
RapidChip Heads to 90nm
Ditchin' DAC
Analysis from an Absentee
What the Hell is ESL?
"Enigmatic Software L______?"
Are These Guys Dense, or What?
Newest Class of FPGAs Makes Dense Cool


Actel Adds Analog
There's Fusion in our Future

Myopia is one of the few unfortunate consequences of specialization. While focus, refinement, and evolution deliver us some of our most impressive efficiencies, indiscriminate rule breaking is more often the root of spectacular progress. We walk along in our well-walled worlds day-to-day, carefully categorizing concepts like “Field Programmable Gate Array,” “Structured and Platform ASIC,” and “Programmable System on Chip,” and we forget to color outside the lines occasionally, just to see what happens.

Actel announced its new Fusion architecture this week, and somebody clearly went a little crazy with the coloring book. When we digitally-blinded folks consider the construction of future “Systems on Chip” we are all too happy to overlook the analog part of our system. Somewhere in the back of our minds, we know that the real “System” includes lots of things we typically don’t discuss, like power supplies, mechanical parts, antennae, and other components designed by people who probably flunked out on Karnaugh maps and had to settle for one of the less prestigious branches of engineering. Disregard the fact that we never quite completely understood Laplace transforms or that we still shiver at the idea of a transistor that’s lost its way somewhere between saturation and depletion. Deep down, we probably feel safer pretending that analog really isn’t involved.

Now that Actel has announced its upcoming Fusion family of FPGAs with interesting amounts of built-in analog, we must all reconsider our definitions and re-establish our comfort zone. Fortunately for us, Fusion also carries with it a well-conceived design environment and methodology that will simplify the task of assembling a single-chip, mixed-signal FPGA system with built-in volatile and non-volatile memory. Unfortunately for us, we’ve got “6 to 9 months” to get used to the idea. [more]

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